Differential Amplifier

CIRCUIT

Look under the hood of most op amps, comparators or audio amplifiers, and you'll discover this powerful front-end circuit - the differential amplifier. A simple circuit able to amplify small signals applied between its two inputs, yet reject noise signals common to both inputs. This circuit has a unique topology: two inputs and two outputs. Although you can tap the signal from one output only, taking the difference between both outputs delivers twice the gain! And it improves Common-Mode Rejection (CMR), an essential function when the common-mode signal is a noise source or DC bias from a previous stage.

GAIN AND REJECTION
How does this amplifier amplify differential signals and reject common ones? The bias condition assumes equal voltages at VB1 and VB2, forcing the bias current IE (set by RE) to split equally between the transistors resulting in IC1 = IC2. With RC1 = RC2, equal voltages develop at VC1 and VC2. 

DIFFERENTIAL GAIN
Now suppose a differential signal is applied to the inputs. This will incrementally increase and decrease the base voltages to

VB1 + ΔV  and  VB2 - ΔV

Because Q1 conducts a little more and Q2 a little less, IE now splits unevenly creating

IC1 > IC2

This, in turn, forces the voltage at VC1 to decrease and VC2 to increase. The result: a voltage change at each output due to a differential input.

COMMON-MODE REJECTION
Now suppose a common-mode input signal is applied. We incrementally increase both inputs to

VB1 + ΔV  and  VB2 + ΔV

Because the conduction level of neither transistors has changed (both bases and emitters moved by the same amount), the collector currents did not change.

IC1 = IC2 ≈ IE / 2.

Subsequently, the voltages at VC1 and VC2 remain the same! Therefore, the circuit has rejected a signal common to both inputs.
Well, the last statement is almost true. Actually, a change in emitter voltage had a small ill effect. It changed the bias current IE set by RE. And this directly impacted IC1 = IC2 ≈IE / 2, slightly shifting the levels at VC1, VC2. As you can see the rejection is not perfect. However, it can still be effective at removing a large part of noise or a DC bias common to both inputs.

DIFFERENTIAL GAIN
How do we calculate the differential voltage gain? You can think of Q1 and Q2 as current sources controlled by their base voltages. RC1 and RC2 then convert the currents back into voltages. First, the small signal collector current

iC = gm ∙ vB

where the transconductance gm  (A / V) is set by the DC collector current 
gm = Ic / VT = Ic / 25 mV at room temperature. Then, RC transforms ic back to a voltage

vC = RC ∙ gm ∙ vB

Getting the input VS into the picture, notice it divides equally across each base-emitter junction, but with opposite polarities. Putting it all together you get a single-ended output for each transistor

vC1 = RC1 ∙ gm ∙+VS / 2

vC2 = RC2 ∙ gm ∙ -VS / 2

Subtracting the two outputs gets you a differential output of

vC1 - vC2 = RC ∙ gm ∙ VS

What about the bias current? RE sets the bias at  Ie = (-0.6V - VDD) / RE = (-0.6 V - (-15 V)) / 7.2 k = 2 mA which divides equally between Q1 and Q2 giving 

Ic1 = Ic2 ≈ Ie / 2 ≈ 1 mA

Finally, we easily calculate gm = 1 mA / 25 mV = 0.04 A/V. The single-ended gain becomes

vC1 / VS = RC1 ∙ gm ∙ 1/2
              = 1 k ∙ 0.04 ∙ 1/2
              = 20 V/V

 CIRCUIT INSIGHT   Run a simulation of BJT_DIFFAMP1.CIR. For VS = 10 mV peak, do you see about 200 mV peak at V(3)? Check out the signal at V(4). Is it equal and opposite to V(3)? To double the gain, remove traces V(3) and V(4) and plot the difference between the two outputs:
V(3)-V(4) or V(3,4).
 HANDS-ON DESIGN   How can you adjust the gain? Notice, that RE sets Ic, which determines gm, which directly sets the gain. So to decrease the gain by a factor of 2 or 3, for example, just increase RE by a factor of 2 or 3. Looking at the output equation, how else can you adjust gain? Try adjusting the values of RC1 and RC2 to vary the gain.

COMMON MODE REJECTION
 CIRCUIT INSIGHT   To see the CMR in action, zero the signal source by setting VS to 0MVPEAK. Then turn up VCM to something like 100MVPEAK. Run a new simulation. What happens at both
V(3) and V(4)? Notice the output voltages are very small! And to boot, they move in the same direction. This can work in our favor if we're able to take the difference between outputs, V(3,4). Thisdifferential output further improves the CMR! Now, try mismatching the RCs by a percent or two and watch what happens at V(3,4).
In practice, how do you take the difference? Simply follow a differential amplifier with another differential amplifier. Or, like in op amp circuits, subtract the collector currents directly using additional transistors to mirror current from one collector to another. ( A future design topic to be sure.)


HOW MUCH DISTORTION?
 HANDS-ON DESIGN    How big can VS be before the output becomes distorted. Restore VS back to 10MVPEAK and set VCM to 0MVPEAK. Rerun the diff amp simulation and plot V(3,4). Okay, it looks pretty normal. Now, turn VS up to something like 20, 50 or 100 mV. What's happening to the natural beauty of the output sinewave?
Want a better view of the input / output transfer curve? You're not limited to plotting time on the X-axis. In fact, you can change it to a different variable. ( Most simulators let do this by clicking on the X-Axis or via a pull-down menu item.) Try plotting V(3,4) on the Y-Axis and V(1) on the X-Axis. How much of this input / output curve is actually a straight line?

THD
If you're interested, SPICE can calculate the Total Harmonic Distortion (THD). For example, including the statement

.FOUR 10KHZ V(3,4)

asks SPICE to calculate the percentage of higher harmonics to the 10 kHz fundamental sinewave in the waveform at V(3,4). If its all 10 kHz fundamental and no harmonics, you've got pure sinewave dancing at the output. However, as is typical in most amplifiers, the larger signal, the more distorted it gets.
Run a few simulations while increasing VS beyond 10 mV. Checkout the THD results appearing in the in the output text file, BJT_DIFFAMP1.OUT.

VOLTAGE-CONTROL AMPLIFIER
The differential amplifier makes a handy Voltage-Controlled Amplifier (VCA). All you need to do is vary the emitter bias current ( which of course varies the transistor's transconductance.) How? One way is to replace the -15 VDC supply with a voltage source that varies. For example, use a PWL statement to linearly ramp VDD slowly (say over 1000us ) from -5 V to -15 V. Does the output at V(3,4) increase over time? Remember to increase the total time for the transient analysis as needed.

LEVEL SHIFTING
The current-source nature of the transistor's output provides a big benefit. You can shift the output to different voltage levels. If the next stage needs a voltage biased around 25 V, for example, simply change VCC to a higher voltage. Although the output DC bias voltage will be higher, the gain should remain basically the same.
You can also shift the output to a negative rail! Just flip the entire circuit upside down and swap the NPN transistors for PNPs. Many op amps and audio amps shift the output to the negative rail, delivering the signal to the next stage, the Miller Integrator.

SPICE FILE

BJT_DIFFAMP1.CIR - BJT DIFFERENTIAL AMPLIFIER

* * SIGNAL SOURCE VS 1 2 AC 1 SIN(0 10MVPEAK 10KHZ) VCM 2 0 SIN(0 0MVPEAK 5KHZ) * * POWER SUPPLIES VCC 11 0 DC +15V VDD 12 0 DC -15V * Q1 3 1 5 Q2N2222 Q2 4 2 5 Q2N2222 RC1 11 3 1000 RC2 11 4 1000 RE 5 12 7.2K * * .model Q2N2222  NPN(Is=3.108f Xti=3 Eg=1.11 Vaf=131.5 Bf=217.5 Ne=1.541 +               Ise=190.7f Ikf=1.296 Xtb=1.5 Br=6.18 Nc=2 Isc=0 Ikr=0 Rc=1 +               Cjc=14.57p Vjc=.75 Mjc=.3333 Fc=.5 Cje=26.08p Vje=.75 +               Mje=.3333 Tr=51.35n Tf=451p Itf=.1 Vtf=10 Xtf=2 Rb=10) * * * CHECK DISTORTION WITH FOURIER SERIES ANALYSIS .FOUR 10KHZ V(3,4) * * ANALYSIS .TRAN  5US  200US .AC  DEC  5 1K 100MEG * * VIEW RESULTS .PRINT TRAN  V(3) .PRINT AC  V(3) .PROBE .END

 Video: Amplificador Diferencial

Fuente: Link

Hecho Por:

Reyes Vargas Jairo Alberto